module top;
  logic clk;
  typedef enum {ADD, SUM, MULT, DIV} opcode_e;
  class Transaction;
    rand opcode_e opcode;
    rand byte operand1;
    rand byte operand2;
  endclass : Transaction

  Transaction tr;

  covergroup cover1 @(posedge clk);
    coverpoint tr.opcode;
  endgroup

  covergroup cover2;
    coverpoint tr.operand1
    {
      bins min = {-128};
      bins zero = {0};
      bins max = {127};
      bins def = default;
   }
  endgroup
endmodule