library ieee;
use ieee.std_logic_1164.all;

package mine is
  function extract (vect : std_logic_vector;
                    beginning : natural;
                    ending : natural) return std_logic_vector;
end mine;

package body mine is
  function extract (vect : std_logic_vector;
                    beginning : natural;
                    ending : natural) return std_logic_vector is
    variable temp : std_logic_vector(beginning downto ending);
    variable copy : std_logic_vector(vect'length - 1 downto 0);
  begin
    copy := vect;
    assert (beginning >= ending)
      report "beginning is less than ending"
      severity note;  
    assert (beginning - ending <= vect'length - 1)
      report "subvector is too large"
      severity note;
    temp := copy(beginning downto ending);
    return (temp);
  end extract;
end mine;

use work.mine.all;

library ieee;
use ieee.std_logic_1164.all;

entity try is
end try;

architecture try of try is
  signal this : std_logic_vector(0 to 5);
  signal that : std_logic_vector (18 downto 0);
begin
  process
  begin
    this <= extract("00000111000000", 7, 2) after 10 ns;
    this <= transport extract("00000111000000", 2, 7) after 20 ns;
    that <= extract("00000111000000", 20, 2) after 30 ns;
    wait;
  end process;
end try;