library ieee;
use ieee.std_logic_1164.all;

entity with_test is
end with_test;

architecture with_test of with_test is
  type STATE_TYPE is (idle, terminate, increase, maintain, decrease);
  signal state : STATE_TYPE;
  signal a, b : std_logic_vector (1 downto 0);
begin
  with state select
    a <= "11" when idle,
         "01" when terminate | increase,
         "10" when maintain | decrease,
         "11" when others;
  with state select
    b <= "00" when idle,
         "--" when terminate | increase,
         "11" when maintain | decrease,
         "01" when others;
end with_test;