library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

entity COUNT is
  port (CLK, RESET : std_logic;
        QOUT : out UNSIGNED(3 downto 0));
end COUNT;

architecture BEHAVE of COUNT is
begin
  process(RESET, CLK)
    variable QTEMP : UNSIGNED(3 downto 0);
  begin
    if (RESET = '1') then
      QTEMP := "0000";
    elsif (CLK'event and CLK = '1') then
      if (QTEMP = UNSIGNED'("1111")) then
        QTEMP := "0000";
      else
        QTEMP := QTEMP + '1';
      end if;
    end if;
  QOUT <= QTEMP;
  end process;
end BEHAVE;