entity Fig8_14 is
  port(a: in integer range 0 to 3;
       b: out bit);
end Fig8_14;

architecture latch_example of Fig8_14 is
begin
  process(a)
  begin
    case a is
      when 0 => b <= '1';
      when 1 => b <= '0';
      when 2 => b <= '1';
      when others => null;
    end case;
  end process;
end latch_example;